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    ESD in Silicon Integrated Circuits

    by E. Ajith Amerasekera

    rating: 3.0 (1 reviews)

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    * Examines the various methods available for circuit protection, including coverage of the newly developed ESD circuit protection schemes for VLSI circuits.
    * Provides guidance on the implement

     

     

    Details: rank: #2,549,859 price: $125.69 bound: publisher: Wiley; 2 edition (May 15, 2002) lang: English asin: isbn: 0471498718, 978-0471498711, weight: 1.6 pounds ( filesize:

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

     

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    ESD in Silicon Integrated Circuits E. Ajith Amerasekera

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    ESD in Silicon Integrated Circuits

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    L... Public Profile Ajith Amerasekera 所在地区 美国 旧金山湾区 所属行业 半导体 查看完整档案 Public Profile Ajith Chandran Technical Leader @ Cisco Systems 所在地区... 1st AChern Show more authors ... 2015年8月22日 - Tc=Coe*power+TO;C=Tc/TO)D—pow(C,工);E=(一1)*13/死; Nd---A*...皿Trar洲onsElectro D晰僻,1991,38(9);2161—2168.[3]AjithAmerasekera,... 2012年12月20日 - 极Ioc=q*ni^2*Ae*Dn/(Nb*ωb) ;q 现子现荷1.602e-19c, ni 现现 ...Ajith Amerasekera[4] “Modeling MOS Snapback for circuit-level ESD simulation... 2014年5月5日 - Ioc=q*ni^2*Ae*Dn/(Nb*ω b) ; q 电子电荷 1.602e-19c, ni 约为 ...Ajith Amerasekera [4] “Modeling MOS Snapback for circuit-level ESD simulati... 2010年7月22日 - ESDinSiliconIntegratedCircuits,ndEditionAjithAmerasekera,CharvakaDuvvuryCo..¥2,186.00 + 免配送费 卖家: 中国国际图书贸易集团公司(瑞购网) 账户充值 前翻 后翻 听 正在播放..AMPARA

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